The present invention relates to a semiconductor device, and particularly to a semiconductor device comprising an electrically programmable nonvolatile memory.
There are methods of storing complementary data in a pair of two memory cells in order to improve the retention characteristic of an electrically programmable, nonvolatile memory such as a flash memory. For example, Patent literature 1 (Japanese Patent Laid-Open No. 2008-117510) discloses a semiconductor device including a memory array having a plurality of first memory elements and second memory elements as a one-bit twin cell. A read circuit which determines the memory state of the twin cell differentially amplifies complementary data being output from the first memory element and the second memory element of the selected twin cell.